Catalogue 2019 - 2020

CPE 562 VHDL: Simulation and Synthesis

Credits

3 cr.

Prerequisite

CPE 271 or equivalent.

Course Description

This project-oriented course covers the design of digital systems using VHSIC Hardware Description Language (VHDL), synthesizing the design, and mapping it onto hardware (Altera DE2-115 Field Programmable Gate Arrays (FPGA) boards). Students learn VHDL language to describe digital circuits and to write test bench for those descriptions for design verification. Students can distinguish synthesis coding versus simulation coding. Students will learn different coding styles, such as structural, data flow, and behavioral coding styles, as well as identify the differences. Students will use functions, procedures, components and generics to describe hardware. Students also acquire the skills to use Altera Quartus synthesis tools as well as the Altera Edition of the MultiSim simulator. The course provides a solid foundation for advanced work.

Cross Listed Courses

CPE 462

Fee